Invention Grant
- Patent Title: Semiconductor device and method having a through substrate via and an interconnect structure
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Application No.: US17874741Application Date: 2022-07-27
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Publication No.: US12148664B2Publication Date: 2024-11-19
- Inventor: Ming-Fa Chen , Tzuan-Horng Liu , Chao-Wen Shih
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/3065 ; H01L23/00 ; H01L25/00 ; H01L25/065

Abstract:
An embodiment is a method including forming a first interconnect structure over a first substrate, the first interconnect structure comprising dielectric layers and metallization patterns therein, patterning the first interconnect structure to form a first opening, coating the first opening with a barrier layer, etching a second opening through the barrier layer and the exposed portion of the first substrate, depositing a liner in the first opening and the second opening, filling the first opening and the second opening with a conductive material, and thinning the first substrate to expose a portion of the conductive material in the second opening, the conductive material extending through the first interconnect structure and the first substrate forming a through substrate via.
Public/Granted literature
- US20220375793A1 Semiconductor Device and Method Public/Granted day:2022-11-24
Information query
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