Invention Grant
- Patent Title: Delta-sigma modulator with modified quantization error shaping
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Application No.: US18064823Application Date: 2022-12-12
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Publication No.: US12149252B2Publication Date: 2024-11-19
- Inventor: Luigi Grimaldi , Dmytro Cherniak , Fabio Padovan , Giovanni Boi
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Harrity & Harrity, LLP
- Main IPC: H03L7/081
- IPC: H03L7/081 ; H03L7/107 ; H03L7/23

Abstract:
A digital phase-locked loop (DPLL) may include a delta-sigma modulator (DSM). The DSM may include a delay component configured to perform noise shaping of a quantization error introduced by the DSM. The DSM may include a noise transfer function (NTF) component configured to perform filtering of the quantization error introduced by the DSM. The DSM may include an adjustment transfer function (ATF) component configured to cause the filtering of the quantization error to be applied on top of the noise shaping such that an impact of the NTF component on the noise shaping is reduced.
Public/Granted literature
- US20240195420A1 DELTA-SIGMA MODULATOR WITH MODIFIED QUANTIZATION ERROR SHAPING Public/Granted day:2024-06-13
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