Invention Grant
- Patent Title: Semiconductor device including wiring substrate having multiple signal wirings and multiple insulating layers
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Application No.: US17841196Application Date: 2022-06-15
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Publication No.: US12237254B2Publication Date: 2025-02-25
- Inventor: Keita Tsuchiya , Shuuichi Kariyazaki , Kazuhiro Mitamura
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Rimon P.C.
- Priority: JP2021-140945 20210831
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/14 ; H01L23/36 ; H01L23/367 ; H01L23/66 ; H01P3/08
Abstract:
A wiring substrate includes: a first insulating layer; a ground plane formed on the first insulating layer; a second insulating layer formed on the first insulating layer such that the ground plane is covered with the second insulating layer; a first signal wiring formed on the second insulating layer; a third insulating layer formed on the second insulating layer such that the first signal wiring is covered with the third insulating layer; and a second signal wiring formed on the third insulating layer and electrically connected with the first signal wiring. The first signal wiring is arranged in a region overlapping with a portion of a heat radiating plate. The second signal wiring is not arranged in the region. The ground plane has an opening portion located at a position overlapping with the first signal wiring. The opening portion is formed so as to extend along the first signal wiring.
Public/Granted literature
- US20230066512A1 SEMICONDUCTOR DEVICE Public/Granted day:2023-03-02
Information query
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