The device for the comparison of the levels of two input signals MI, PI includes a first comparator COMP1, the switching of the comparator being expressed by a change-over of the output OUT1 of the comparator from a first logic state into a second logic state, the change-over of the output OUT1 from one logic state null0null into the other state null1null being faster than the change-over in the other direction. The device also includes a second comparator COMP2 with an identical structure, to whose input the signals to be compared are applied invertedly so that the switching operations in the comparators are inverted. The output of each comparator is applied to an associated logic circuit 1, 2 capable of accelerating the inverse switching in the other comparator for a change in the output corresponding to the fastest change-over.