公开(公告)号：US20020030515A1

公开(公告)日：2002-03-14

申请号：US09808744

申请日：2001-03-15

Applicant: STMicroelectronics S.A.

Inventor： Christophe Garnier

IPC: H03K005/22

CPC classification number: H03K5/2481 ,  H03F1/0244

Abstract: A device for comparing two input signals includes a first comparator with differential outputs to whose inputs the signals are applied. The first comparator is followed by a second comparator delivering an output logic signal of the device. Each comparator includes at least one input differential stage, and each stage has two arms biased by a bias current generator. The comparison device may also include at least one additional current supply circuit associated with an arm of the input differential stage of the first comparator to copy the current of the arm and add it, with a multiplier factor, to the bias current of the input differential stage of the second comparator. This facilitates a corresponding switch-over.

公开(公告)号：US20010028260A1

公开(公告)日：2001-10-11

申请号：US09795055

申请日：2001-02-26

Applicant: STMicroelectronics S.A.

Inventor： Christophe Garnier

IPC: H03K005/22

CPC classification number: H03K5/2481

Abstract: The device for the comparison of the levels of two input signals MI, PI includes a first comparator COMP1, the switching of the comparator being expressed by a change-over of the output OUT1 of the comparator from a first logic state into a second logic state, the change-over of the output OUT1 from one logic state null0null into the other state null1null being faster than the change-over in the other direction. The device also includes a second comparator COMP2 with an identical structure, to whose input the signals to be compared are applied invertedly so that the switching operations in the comparators are inverted. The output of each comparator is applied to an associated logic circuit 1, 2 capable of accelerating the inverse switching in the other comparator for a change in the output corresponding to the fastest change-over.

Abstract translation: 用于比较两个输入信号MI，PI的电平的装置包括第一比较器COMP1，比较器的切换由比较器的输出端OUT1从第一逻辑状态转换成第二逻辑状态 输出OUT1从一个逻辑状态“0”转换到另一状态“1”的转换比另一方向的转换快。 该装置还包括具有相同结构的第二比较器COMP2，与其输入相反的信号被反相地施加以使比较器中的开关操作反转。 每个比较器的输出被施加到相关联的逻辑电路1,2，其能够加速另一比较器中的反向切换，以对应于最快转换的输出变化。