发明申请
- 专利标题: Plated terminations
- 专利标题(中): 电镀端接
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申请号: US10409023申请日: 2003-04-08
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公开(公告)号: US20030231457A1公开(公告)日: 2003-12-18
- 发明人: Andrew P. Ritter , Robert Heistand II , John L. Galvagni , Sriram Dattaguru
- 申请人: AVX Corporation
- 申请人地址: null
- 专利权人: AVX Corporation
- 当前专利权人: AVX Corporation
- 当前专利权人地址: null
- 主分类号: H01G004/228
- IPC分类号: H01G004/228
摘要:
Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on top and bottom sides of a monolithic structure can facilitate the formation of wrap-around plated terminations. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and termination materials may be employed in the formation of the subject self-determining plated terminations.
公开/授权文献
- US07152291B2 Method for forming plated terminations 公开/授权日:2006-12-26
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