发明申请
US20040113279A1 Copper recess process with application to selective capping and electroless plating 有权
铜凹槽工艺,适用于选择性封盖和无电镀

Copper recess process with application to selective capping and electroless plating
摘要:
An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the conductive features.
信息查询
0/0