利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

6 条记录 (耗时 0.013 秒)

    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same
    3.
    发明申请
    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same 有权

    公开(公告)号：US20020068431A1

    公开(公告)日：2002-06-06

    申请号：US10034862

    申请日：2001-12-28

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

    IPC分类号： H01L021/4763

    CPC分类号： H01L21/76849 ,  H01L21/76834 ,  H01L21/7684 ,  H01L28/60

    摘要： A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

    BILAYER CMP PROCESS TO IMPROVE SURFACE ROUGHNESS OF MAGNETIC STACK IN MRAM TECHNOLOGY
    5.
    发明申请
    BILAYER CMP PROCESS TO IMPROVE SURFACE ROUGHNESS OF MAGNETIC STACK IN MRAM TECHNOLOGY 失效
    提高MRAM技术中磁性层的表面粗糙度的BILAYER CMP工艺

    公开(公告)号：US20040087038A1

    公开(公告)日：2004-05-06

    申请号：US10289488

    申请日：2002-11-06

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  INFINEON TECHNOLOGIES NORTH AMERICA CORP.

    发明人： Gregory Costrini ,  John Hummel ,  Kia-Seng Low ,  Mahadevaiyer Krishnan

    IPC分类号： H01L021/00

    CPC分类号： H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/26 ,  H01F10/3254 ,  H01F41/307 ,  H01L27/222

    摘要： A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method comprises depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.

    摘要翻译： 公开了一种用于制造磁阻随机存取存储器（MRAM）单元的方法，其减轻了由隧道结层和磁性层之间的界面中的粗糙度引起的Neel耦合的问题。 该方法包括在导体上沉积第一和第二阻挡层，其中第一阻挡层的抛光速率不同于第二阻挡层的抛光速率。 然后通过化学机械抛光（CMP）基本上除去第二阻挡层，留下非常平滑和均匀的第一阻挡层。 当磁性堆叠形成在抛光的第一阻挡层上时，界面粗糙度不会转变为隧道结层，并且不会发生磁化腐蚀。