Invention Application
- Patent Title: Method for fabricating semiconductor device having stacked-gate structure
- Patent Title (中): 具有层叠栅结构的半导体器件的制造方法
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Application No.: US10683612Application Date: 2003-10-10
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Publication No.: US20050020044A1Publication Date: 2005-01-27
- Inventor: Tzu-En Ho , Chih-Hao Chang , Chang-Rong Wu , Kuo-Hui Su
- Applicant: Tzu-En Ho , Chih-Hao Chang , Chang-Rong Wu , Kuo-Hui Su
- Assignee: Nanya Technology Corporation
- Current Assignee: Nanya Technology Corporation
- Priority: TW92120045 20030723
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/4763 ; H01L29/49
Abstract:
A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.
Public/Granted literature
- US07022603B2 Method for fabricating semiconductor device having stacked-gate structure Public/Granted day:2006-04-04
Information query
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