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    Method for fabricating semiconductor device having stacked-gate structure
    1.
    发明授权
    Method for fabricating semiconductor device having stacked-gate structure 有权
    具有层叠栅结构的半导体器件的制造方法

    公开(公告)号：US07022603B2

    公开(公告)日：2006-04-04

    申请号：US10683612

    申请日：2003-10-10

    申请人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    发明人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    IPC分类号： H01L21/44

    CPC分类号： H01L21/28052 ,  H01L29/4933

    摘要： A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.

    摘要翻译： 一种半导体制造方法，该半导体器件具有堆叠栅极结构。 通过介电层与衬底绝缘的衬底上形成多晶硅层。 在多晶硅层上形成金属闪光层，然后在钛层上形成氮化钨层。 使用氮气和氢气对氮化钨层进行退火。 依次形成覆盖氮化钨层的钨层和覆盖层。

    Method for fabricating semiconductor device having stacked-gate structure
    2.
    发明授权
    Method for fabricating semiconductor device having stacked-gate structure 有权
    具有层叠栅结构的半导体器件的制造方法

    公开(公告)号：US07375017B2

    公开(公告)日：2008-05-20

    申请号：US11338579

    申请日：2006-01-23

    申请人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    发明人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    IPC分类号： H01L21/3205

    CPC分类号： H01L21/28052 ,  H01L29/4933

    摘要： A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.

    摘要翻译： 一种半导体制造方法，该半导体器件具有堆叠栅极结构。 通过介电层与衬底绝缘的衬底上形成多晶硅层。 在多晶硅层上形成金属闪光层，然后在钛层上形成氮化钨层。 使用氮气和氢气对氮化钨层进行退火。 依次形成覆盖氮化钨层的钨层和覆盖层。

    Method for fabricating semiconductor device having stacked-gate structure
    4.
    发明申请
    Method for fabricating semiconductor device having stacked-gate structure 有权
    具有层叠栅结构的半导体器件的制造方法

    公开(公告)号：US20050020044A1

    公开(公告)日：2005-01-27

    申请号：US10683612

    申请日：2003-10-10

    申请人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    发明人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

    IPC分类号： H01L21/28 ,  H01L21/4763 ,  H01L29/49

    CPC分类号： H01L21/28052 ,  H01L29/4933

    摘要： A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.

    摘要翻译： 一种半导体制造方法，该半导体器件具有堆叠栅极结构。 通过介电层与衬底绝缘的衬底上形成多晶硅层。 在多晶硅层上形成金属闪光层，然后在钛层上形成氮化钨层。 使用氮气和氢气对氮化钨层进行退火。 依次形成覆盖氮化钨层的钨层和覆盖层。

    Methods for manufacturing stacked gate structure and field effect transistor povided with the same
    6.
    发明申请
    Methods for manufacturing stacked gate structure and field effect transistor povided with the same 有权
    堆叠栅极结构和场效应晶体管的制造方法相同

    公开(公告)号：US20050074957A1

    公开(公告)日：2005-04-07

    申请号：US10864320

    申请日：2004-06-10

    申请人： Tzu-En Ho ,  Chang-Rong Wu

    发明人： Tzu-En Ho ,  Chang-Rong Wu

    IPC分类号： H01L21/00 ,  H01L21/28 ,  H01L21/336 ,  H01L29/49 ,  H01L29/78

    CPC分类号： H01L29/7833 ,  H01L21/28061 ,  H01L29/4933

    摘要： The present invention provides a method for manufacturing a stacked-gate structure in a semiconductor device. The method includes the steps of sequentially forming a gate dielectric layer, a poly-silicon layer, a titanium layer, and a WNX layer on a semiconductor substrate, carrying out a rapid thermal annealing (RTA) in a nitrogen ambient, forming a silicon nitride layer on the tungsten layer, and patterning the multilayer thin-film structure into a predetermined configuration.

    摘要翻译： 本发明提供一种在半导体器件中制造堆叠栅极结构的方法。 该方法包括以下步骤：在半导体衬底上依次形成栅介质层，多晶硅层，钛层和WNX层，在氮气环境中进行快速热退火（RTA），形成氮化硅 层，并且将多层薄膜结构图案化成预定的构造。

    Methods for manufacturing stacked gate structure and field effect transistor provided with the same
    8.
    发明授权
    Methods for manufacturing stacked gate structure and field effect transistor provided with the same 有权
    制造堆叠栅极结构的方法和具有该栅极结构的场效应晶体管

    公开(公告)号：US07101777B2

    公开(公告)日：2006-09-05

    申请号：US10864320

    申请日：2004-06-10

    申请人： Tzu-En Ho ,  Chang-Rong Wu

    发明人： Tzu-En Ho ,  Chang-Rong Wu

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/7833 ,  H01L21/28061 ,  H01L29/4933

    摘要： The present invention provides a method for manufacturing a stacked-gate structure in a semiconductor device. The method includes the steps of sequentially forming a gate dielectric layer, a poly-silicon layer, a titanium layer, and a WNX layer on a semiconductor substrate, carrying out a rapid thermal annealing (RTA) in a nitrogen ambient, forming a silicon nitride layer on the tungsten layer, and patterning the multilayer thin-film structure into a predetermined configuration.

    摘要翻译： 本发明提供一种在半导体器件中制造堆叠栅极结构的方法。 该方法包括以下步骤：在半导体衬底上顺序地形成栅介质层，多晶硅层，钛层和WN层，并进行快速热退火（RTA） 氮气环境，在钨层上形成氮化硅层，并将多层薄膜结构图案化成预定的构型。

    Resistive random access memory structure with tri-layer resistive stack
    10.
    发明授权
    Resistive random access memory structure with tri-layer resistive stack 有权
    具有三层电阻堆栈的电阻式随机存取存储器结构

    公开(公告)号：US08901527B2

    公开(公告)日：2014-12-02

    申请号：US12829392

    申请日：2010-07-02

    申请人： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih

    发明人： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih

    IPC分类号： H01L29/02 ,  H01L45/00

    CPC分类号： H01L45/165 ,  H01L45/08 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1641

    摘要： An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.

    摘要翻译： RRAM包括在形成介电层之后，在电介质层上的处理中包括电介质层和剩余的氧离子或氮离子的电阻层。 当RRAM被施加电压时，氧离子或氮离子占据电介质层中的空位以增加电阻层的电阻。 当RRAM施加另一电压时，从空位中去除氧离子或氮离子以降低电阻层的电阻。