发明申请
- 专利标题: Transistor circuit and booster circuit
- 专利标题(中): 晶体管电路和升压电路
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申请号: US10924507申请日: 2004-08-24
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公开(公告)号: US20050045964A1公开(公告)日: 2005-03-03
- 发明人: Kazuo Henmi , Nobuyuki Otaka
- 申请人: Kazuo Henmi , Nobuyuki Otaka
- 优先权: JPJP2003-301499 20030826
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; H01L21/822 ; H01L27/02 ; H01L27/06 ; H01L27/092 ; H01L27/10 ; H02M3/07 ; H03K5/02 ; H01L29/76 ; H01L29/94 ; H01L31/062
摘要:
To an output of an NMOS having one end connected to a power source, a capacitor and a PMOS are connected. A capacitor is connected to the output of the PMOS. The NMOS and the PMOS are turned on alternately. A pulse is applied to other end of the capacitor which is connected to the output of the NMOS, to shift the output of the NMOS for boosting. Then, a back gate of the NMOS is connected, via a PMOS in an on state, to the power source. With this structure, the PMOS provides a resistor component when the output terminal short-circuits.
公开/授权文献
- US07323753B2 MOS transistor circuit and voltage-boosting booster circuit 公开/授权日:2008-01-29
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