Floating gate memory cell, floating gate memory arrangement circuit arrangement and method for fabricating a floating gate memory cell

发明申请

US20050048720A1 Floating gate memory cell, floating gate memory arrangement circuit arrangement and method for fabricating a floating gate memory cell 有权

标题翻译：浮栅存储器单元，浮栅存储器布置电路布置和制造浮栅存储单元的方法

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专利标题： Floating gate memory cell, floating gate memory arrangement circuit arrangement and method for fabricating a floating gate memory cell
专利标题（中）： 浮栅存储器单元，浮栅存储器布置电路布置和制造浮栅存储单元的方法
申请号： US10926838

申请日： 2004-08-25
公开(公告)号： US20050048720A1

公开(公告)日： 2005-03-03
发明人: Andrew Graham , Franz Hofmann , Michael Specht
申请人： Andrew Graham , Franz Hofmann , Michael Specht
申请人地址： DE Munich
专利权人： Infineon Technologies AG
当前专利权人： Infineon Technologies AG
当前专利权人地址： DE Munich
优先权： DE10207980.3 20020225
主分类号： H01L21/8247
IPC分类号： H01L21/8247 ; H01L21/28 ; H01L21/336 ; H01L27/115 ; H01L29/788 ; H01L29/792

Floating gate memory cell, floating gate memory arrangement circuit arrangement and method for fabricating a floating gate memory cell

摘要：

Floating gate memory cell having a first layer with first and second source/drain regions and a channel region arranged between and next to the first and second source/drain regions, and a floating gate layer arranged on the first layer, wherein the first and second source/drain regions and the floating gate layer are formed of a metallically conductive material, and the channel region is formed of an electrically insulating material.

摘要（中）：

具有具有第一和第二源极/漏极区域的第一层和布置在第一和第二源极/漏极区域之间和之后的沟道区域的浮动栅极存储单元以及布置在第一层上的浮动栅极层，其中第一和第二源极/漏极区域和浮置栅极层由金属导电材料形成，并且沟道区域由电绝缘材料形成。

公开/授权文献

US07385243B2 Floating gate memory cell with a metallic source/drain and gate, and method for manufacturing such a floating gate memory gate cell 公开/授权日：2008-06-10

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