Invention Application
- Patent Title: Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop
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Application No.: US10749560Application Date: 2004-01-02
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Publication No.: US20050057312A1Publication Date: 2005-03-17
- Inventor: Yeong-Jar Chang , Shen-Tien Lin , Wen-Ching Wu , Kun-Lun Luo
- Applicant: Yeong-Jar Chang , Shen-Tien Lin , Wen-Ching Wu , Kun-Lun Luo
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Priority: TW092125529 20030916
- Main IPC: G01R29/26
- IPC: G01R29/26 ; H03L7/06 ; H03L7/00

Abstract:
A built-in jitter measurement circuit for a VCO (voltage-controlled oscillator) and a PLL (phase-locked loop) is disclosed. The circuit includes a divider for dividing frequency of a signal, a time to digital converter (TDC) for converting the period of the divided signal into digital values, a variance calculator for calculating variance of the period of the divided signal, a mean calculator for calculating mean value of the period of the divided signal, a encoder and counter for encoding and calculating the period of the divided signal, and a state controller as a controller for all other components. The circuit disclosed utilizes output clock of an opened-loop circuit to be measured and a divider for increasing jitter of the original signal. By measuring the bandwidth of a closed-loop circuit, accordingly, jitter of output clock of an opened-loop or an closed-loop circuit is measured by correlating the measured bandwidth and the jitter values from extrapolation.
Public/Granted literature
- US06937106B2 Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop Public/Granted day:2005-08-30
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