Invention Application
- Patent Title: Method and apparatus for reducing strapping devices
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Application No.: US11002258Application Date: 2004-12-03
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Publication No.: US20050080938A1Publication Date: 2005-04-14
- Inventor: Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
- Applicant: Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
- Assignee: Silicon Integrated Systems Corp.
- Current Assignee: Silicon Integrated Systems Corp.
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F9/24 ; G06F13/40 ; G06F13/42

Abstract:
A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state. Subsequently, the configuration value fetched from the non-volatile memory is asserted to the at least one configurable device to configure the configurable device, and then the processor reset signal is deasserted, and the at least one configurable device is thereby completely configured.
Public/Granted literature
- US07206930B2 Method and apparatus for reducing strapping devices Public/Granted day:2007-04-17
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