- 专利标题： Method of fabricating semiconductor integrated circuit device
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申请号： US11006702申请日： 2004-12-08
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公开(公告)号： US20050118805A1公开(公告)日： 2005-06-02
- 发明人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
- 申请人： Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
- 主分类号： H01L21/285
- IPC分类号： H01L21/285 ; H01L21/336 ; H01L21/762 ; H01L21/8238 ; H01L23/532 ; H01L29/45 ; H01L29/49 ; H01L29/78 ; H01L21/3205 ; H01L21/4763 ; H01L21/44
摘要：
A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.