发明申请
- 专利标题： Area efficient asymmetric cellular CMOS array
- 专利标题（中）： 区域效率非对称蜂窝CMOS阵列
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申请号： US11004955申请日： 2004-12-07
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公开(公告)号： US20050127448A1公开(公告)日： 2005-06-16
- 发明人: Chiang-Yung Ku , Yu-Che Lin , Chung-Lung Pai , Pao-Chuan Lin
- 申请人： Chiang-Yung Ku , Yu-Che Lin , Chung-Lung Pai , Pao-Chuan Lin
- 优先权： TW092135311 20031212
- 主分类号： H01L27/02
- IPC分类号： H01L27/02 ; H01L27/092 ; H01L21/8238 ; H01L29/76 ; H01L31/062 ; H01L31/119
摘要：
A cellular MOS array becomes denser by employing an asymmetric structure, in which the areas of the sources are reduced without changing the length and the width of the channel thereof, and thereby the chip size is reduced and the cost is lowered.
公开/授权文献
- US07002192B2 Area efficient asymmetric cellular CMOS array 公开/授权日：2006-02-21
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