发明申请
- 专利标题: Transistor having vertical junction edge and method of manufacturing the same
- 专利标题(中): 具有垂直接合边缘的晶体管及其制造方法
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申请号: US10751141申请日: 2003-12-31
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公开(公告)号: US20050145952A1公开(公告)日: 2005-07-07
- 发明人: Fernando Gonzalez , Chandra Mouli
- 申请人: Fernando Gonzalez , Chandra Mouli
- 主分类号: H01L21/225
- IPC分类号: H01L21/225 ; H01L21/336 ; H01L21/8234 ; H01L21/8238 ; H01L29/76 ; H01L29/78
摘要:
Techniques for forming devices, such as transistors, having vertical junction edges. More specifically, shallow trenches are formed in a substrate and filled with an oxide. Cavities may be formed in the oxide and filled with a conductive material, such a heavily doped polysilicon. Vertical junctions are formed between the polysilicon and the exposed substrate at the trench edges such that during a thermal cycle, the heavily doped polysilicon will out-diffuse doping elements into the adjacent single crystal silicon advantageously forming a diode extension having desirable properties.
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