发明申请
- 专利标题： Insulated gate-type semiconductor device and manufacturing method of the same
- 专利标题（中）： 绝缘栅型半导体器件及其制造方法
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申请号： US11023961申请日： 2004-12-29
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公开(公告)号： US20050167748A1公开(公告)日： 2005-08-04
- 发明人: Masahito Onda , Hirotoshi Kubo , Shouji Miyahara , Hiroyasu Ishida , Hiroaki Saito
- 申请人： Masahito Onda , Hirotoshi Kubo , Shouji Miyahara , Hiroyasu Ishida , Hiroaki Saito
- 申请人地址： JP Moriguchi-city
- 专利权人： Sanyo Electric Co., Ltd.
- 当前专利权人： Sanyo Electric Co., Ltd.
- 当前专利权人地址： JP Moriguchi-city
- 优先权： JP2004-013426 20040121
- 主分类号： H01L29/417
- IPC分类号： H01L29/417 ; H01L21/265 ; H01L21/336 ; H01L29/08 ; H01L29/41 ; H01L29/423 ; H01L29/49 ; H01L29/72 ; H01L29/739 ; H01L29/76 ; H01L29/78
摘要：
An interlayer dielectric film is completely buried in a trench, and failures caused by step coverage is prevented because a source electrode can be formed substantially uniformly on an upper portion of a gate electrode. Also, in the processes of forming a source region, a body region and an interlayer dielectric film, only one mask is necessary so that the device size is reduced to account for placement error of only one mask alignment.
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