发明申请
- 专利标题: Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same
- 专利标题(中): 包括用于向硅衬底施加拉伸应力的栅电极的半导体器件及其制造方法
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申请号: US11127093申请日: 2005-05-12
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公开(公告)号: US20050202603A1公开(公告)日: 2005-09-15
- 发明人: Hirokazu Sayama , Kazunobu Ohta , Hidekazu Oda , Kouhei Sugihara
- 申请人: Hirokazu Sayama , Kazunobu Ohta , Hidekazu Oda , Kouhei Sugihara
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 优先权: JP2002-336669 20021120
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/265 ; H01L21/336 ; H01L21/8234 ; H01L21/8238 ; H01L27/088 ; H01L27/092 ; H01L29/423 ; H01L29/49 ; H01L29/78 ; H01L21/84
摘要:
A gate insulating film (13) and a gate electrode (14) of non-single crystalline silicon for forming an NMOS transistor are provided on a silicon substrate (10). Using the gate electrode (14) as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the NMOS transistor, whereby the gate electrode (14) is amorphized. Subsequently, a silicon oxide film (40) is provided to cover the gate electrode (14), at a temperature which is less than the one at which recrystallization of the gate electrode (14) occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode (14), and high tensile stress is applied to a channel region under the gate electrode (14). As a result, carrier mobility of the NMOS transistor is enhanced.