Invention Application
- Patent Title: Semiconductor integrated circuit, booster circuitry, and non-volatile semiconductor memory device
- Patent Title (中): 半导体集成电路，升压电路和非易失性半导体存储器件
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Application No.: US11147276Application Date: 2005-06-08
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Publication No.: US20050275004A1Publication Date: 2005-12-15
- Inventor: Yoshihisa Watanabe
- Applicant: Yoshihisa Watanabe
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Priority: JP2004-171584 20040609
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/04 ; G11C16/08 ; G11C16/30 ; H01L21/822 ; H01L21/8247 ; H01L27/04 ; H01L27/105 ; H01L27/115 ; H01L29/788 ; H01L29/792 ; H01L29/94
Abstract:
In a capacitor-containing semiconductor integrated circuit, a portion in which a plurality of capacitors are serially connected together is arranged so that at least part of the capacitors is formed as a well capacitor.
Public/Granted literature
- US07345335B2 Semiconductor integrated circuit, booster circuitry, and non-volatile semiconductor memory device Public/Granted day:2008-03-18
Information query
