Belt unit and image forming apparatus employing same
    1.
    发明授权
    Belt unit and image forming apparatus employing same 有权
    皮带单元和使用其的图像形成装置

    公开(公告)号:US08929774B2

    公开(公告)日:2015-01-06

    申请号:US13312596

    申请日:2011-12-06

    CPC classification number: G03G15/1615 G03G2215/0129

    Abstract: A belt unit is detachably attached to a housing. A holder changes a state of an endless belt by moving a transfer roller between a first state as an endless belt movement state and a second state as a detachment state. The first state allows the endless belt to circulate for image formation, and the second state allows the belt unit to be detached from the housing. The holder moves the transfer roller adjacent supporter independently of the transfer roller and lifts the opening in the endless belt to a prescribed position to expose it to the front side plate.

    Abstract translation: 带单元可拆卸地附接到壳体。 支架通过将转印辊移动到作为环形带移动状态的第一状态和作为分离状态的第二状态之间来改变环形带的状态。 第一状态允许环形带循环用于图像形成,并且第二状态允许带单元与壳体分离。 保持器独立于转印辊移动转印辊与支撑件相邻,并将环形带中的开口提升到规定位置以将其暴露于前侧板。

    NAND-type flash memory and NAND-type flash memory controlling method
    2.
    发明授权
    NAND-type flash memory and NAND-type flash memory controlling method 有权
    NAND型闪存和NAND型闪存控制方法

    公开(公告)号:US07924621B2

    公开(公告)日:2011-04-12

    申请号:US12544284

    申请日:2009-08-20

    CPC classification number: G11C16/26 G11C16/0483

    Abstract: A method of controlling a NAND-type flash memory provided with a latch circuit in which data is temporarily stored has measuring a first consumption current of the latch circuit in a first state in which the latch circuit is caused to retain first logic; measuring a second consumption current of the latch circuit in a second state in which the latch circuit is caused to retain second logic obtained by inverting the first logic; and comparing the first consumption current and the second consumption current to cause the latch circuit to retain logic corresponding to the state corresponding to a smaller one of the first consumption current and the second consumption current.

    Abstract translation: 一种控制NAND型闪速存储器的方法,该闪存具有临时存储数据的锁存电路,在锁存电路被保留第一逻辑的第一状态下测量锁存电路的第一消耗电流; 在第二状态下测量锁存电路的第二消耗电流,其中使得所述锁存电路保持通过反转所述第一逻辑而获得的第二逻辑; 以及比较所述第一消耗电流和所述第二消耗电流以使所述锁存电路保持与所述第一消耗电流和所述第二消耗电流中的较小的一个相对应的状态。

    IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD
    3.
    发明申请
    IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD 有权
    图像形成装置和图像形成方法

    公开(公告)号:US20100303485A1

    公开(公告)日:2010-12-02

    申请号:US12790116

    申请日:2010-05-28

    CPC classification number: G03G15/1605 G03G15/1675 G03G2215/0129

    Abstract: An image forming apparatus includes a receiver to receive image information from an external device, a movable intermediate transfer member, a plurality of latent image bearing members on which a latent image is formed based on the image information, a plurality of developing devices, each of which disposed in proximity to the latent image baring member, to develop the latent image on the latent image bearing member with toner to form a toner image thereon, a transfer bias application mechanism to apply a transfer bias to the intermediate transfer member and halt temporarily and periodically application of the transfer bias in a continuous output mode in which a plurality of images are continuously formed on different recording media sheets based on the image information of the plurality of images received continuously by the receiver, and a secondary transfer member to transfer the superimposed toner image onto a recording medium.

    Abstract translation: 图像形成装置包括从外部装置接收图像信息的接收器,可移动中间转印部件,基于图像信息形成有潜像的多个潜像承载部件,多个显影装置, 其设置在潜像保护构件附近,以通过调色剂在潜像承载部件上显影以在其上形成调色剂图像;转印偏压施加机构,用于向中间转印部件施加转印偏压并暂时停止; 基于由接收器连续接收的多个图像的图像信息,在连续输出模式中周期性地施加转印偏压,其中多个图像被连续地形成在不同的记录介质片上,以及二次转印部件, 调色剂图像到记录介质上。

    NAND FLASH MEMORY
    4.
    发明申请
    NAND FLASH MEMORY 审中-公开
    NAND闪存

    公开(公告)号:US20100124128A1

    公开(公告)日:2010-05-20

    申请号:US12556219

    申请日:2009-09-09

    CPC classification number: G11C16/08 G11C16/16

    Abstract: A NAND flash memory in which data is erased in blocks, has a plurality of memory cell transistors provided in each of the blocks, the memory cell transistor having a floating gate which is formed via a first gate insulating film on a well formed on a semiconductor substrate and a control gate which is formed on the floating gate via a second gate insulating film, and being capable of rewriting data by controlling an amount of charge accumulated on the floating gate; and a row decoder having a plurality of n-type transfer MOS transistors having drains respectively connected to word lines respectively connected to the control gates of the plurality of memory cell transistors, the row decoder controlling gate voltages and source voltages of the transfer MOS transistors.

    Abstract translation: 其中以块为单位擦除数据的NAND闪速存储器具有设置在每个块中的多个存储单元晶体管,存储单元晶体管具有浮置栅极,该浮置栅极通过形成在半导体上的阱上的第一栅极绝缘膜形成 基板和控制栅极,其经由第二栅极绝缘膜形成在浮置栅极上,并且能够通过控制在浮动栅极上累积的电荷量来重写数据; 以及具有多个n型传输MOS晶体管的行解码器,其具有分别连接到分别连接到所述多个存储单元晶体管的控制栅极的字线的漏极,所述行解码器控制所述传输MOS晶体管的栅极电压和源极电压。

    NAND-TYPE FLASH MEMORY AND NAND-TYPE FLASH MEMORY CONTROLLING METHOD
    5.
    发明申请
    NAND-TYPE FLASH MEMORY AND NAND-TYPE FLASH MEMORY CONTROLLING METHOD 有权
    NAND型闪存和NAND型闪存存储器控制方法

    公开(公告)号:US20100067302A1

    公开(公告)日:2010-03-18

    申请号:US12544284

    申请日:2009-08-20

    CPC classification number: G11C16/26 G11C16/0483

    Abstract: A method of controlling a NAND-type flash memory provided with a latch circuit in which data is temporarily stored has measuring a first consumption current of the latch circuit in a first state in which the latch circuit is caused to retain first logic; measuring a second consumption current of the latch circuit in a second state in which the latch circuit is caused to retain second logic obtained by inverting the first logic; and comparing the first consumption current and the second consumption current to cause the latch circuit to retain logic corresponding to the state corresponding to a smaller one of the first consumption current and the second consumption current.

    Abstract translation: 一种控制NAND型闪速存储器的方法,该闪存具有临时存储数据的锁存电路,在锁存电路被保留第一逻辑的第一状态下测量锁存电路的第一消耗电流; 在第二状态下测量锁存电路的第二消耗电流,其中使得所述锁存电路保持通过反转所述第一逻辑而获得的第二逻辑; 以及比较所述第一消耗电流和所述第二消耗电流以使所述锁存电路保持与所述第一消耗电流和所述第二消耗电流中的较小的一个相对应的状态。

    Rotation control motor
    6.
    发明授权
    Rotation control motor 失效
    旋转控制电机

    公开(公告)号:US07573171B2

    公开(公告)日:2009-08-11

    申请号:US11379667

    申请日:2006-04-21

    CPC classification number: H02K23/36 H02K7/106 H02K7/1166 Y10T74/19828

    Abstract: A rotation control motor comprises a shaft, an armature having an armature core of which teeth are wound by wires to form coils, a commutator, and a field magnet. The armature core has a plurality of teeth, the commutator has a plurality of commutator segments corresponding to the number of teeth, and the coils comprise a normal coil and a brake coil. When the motor rotates faster than expected, the brake coil brakes the motor by magnetic flux, and the motor can rotate within a stable speed range.

    Abstract translation: 旋转控制电动机包括轴,具有电枢铁芯的电枢,电枢铁芯通过电线缠绕,以形成线圈,换向器和场磁体。 电枢铁芯具有多个齿,换向器具有与齿数对应的多个换向片,线圈包括正常线圈和制动线圈。 当电机转速比预期的要快时,制动线圈通过磁通量制动马达,电机可以在稳定的转速范围内旋转。

    Moving material electric control device
    7.
    发明授权
    Moving material electric control device 有权
    移动材料电控装置

    公开(公告)号:US07511396B2

    公开(公告)日:2009-03-31

    申请号:US11379262

    申请日:2006-04-19

    CPC classification number: H02K23/26 H02K23/66

    Abstract: A motor comprises a yoke as casing, a shaft extending along a center of the yoke, an annular stator fixed to the yoke and an armature fixed to the shaft to rotate with the shaft inside the stator. The armature comprises a plurality of teeth on the outer circumferential surface. A wire is wound on any of the teeth to form a normal coil. Another wire is wound on another of the teeth to form a brake coil that is a short circuit. When the motor rotates much faster, the brake coil produces magnetic flux which acts as load against the rotation of the motor to allow the motor to rotate slower.

    Abstract translation: 马达包括作为壳体的轭,沿轭的中心延伸的轴,固定到轭的环形定子和固定到轴的电枢,其中定子内的轴旋转。 电枢包括在外圆周表面上的多个齿。 电线缠绕在任何齿上以形成正常线圈。 另一根线缠绕在另一个齿上,形成短路的制动线圈。 当马达旋转得更快时,制动线圈产生磁通,其作为负载抵抗马达的旋转的载荷,以允许马达转动较慢。

    Electric actuator and motor used therein
    8.
    发明授权
    Electric actuator and motor used therein 有权
    其中使用的电动执行器和电机

    公开(公告)号:US07339299B2

    公开(公告)日:2008-03-04

    申请号:US11410753

    申请日:2006-04-25

    Abstract: A motor comprises a rotor fixed to a shaft and a stator comprising a permanent magnet on the inner circumferential surface of a motor casing. The shaft extends from the opening end of the motor casing and has a worm wheel in a gear casing. The end face of the gear casing has an annular projection. The motor casing has an outward flange at the opening end. When the motor casing is connected with the gear casing, an elastic O-ring is fitted between a space formed by the outer circumferential surface of the annular projection, an outer vertical seat face of the gear casing and a corner of the outward flange thereby achieving suitable alignment of the motor casing with the gear casing. The permanent magnet is made of Nd magnet which is pressingly fitted on the inner circumferential surface of the motor casing.

    Abstract translation: 电动机包括固定到轴的转子和在电机壳体的内周面上包括永磁体的定子。 轴从马达壳体的开口端延伸,并在蜗轮壳体中具有蜗轮。 齿轮箱的端面具有环形突起。 马达壳体在开口端具有向外的凸缘。 当马达壳体与齿轮箱连接时,弹性O形环装配在由环形突起的外周面形成的空间,齿轮壳体的外侧垂直座面与向外凸缘的角部之间,从而实现 电动机壳体与齿轮箱的适当对准。 永磁体由压电配合在电动机壳体的内周面上的Nd磁铁制成。

    NONVOLATILE SEMICONDUCTOR MEMORY, ITS READ METHOD AND A MEMORY CARD
    9.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY, ITS READ METHOD AND A MEMORY CARD 失效
    非易失性半导体存储器,其读取方法和存储卡

    公开(公告)号:US20080049508A1

    公开(公告)日:2008-02-28

    申请号:US11838510

    申请日:2007-08-14

    CPC classification number: G11C16/3418 G11C16/3427

    Abstract: A nonvolatile semiconductor memory includes a memory cell array having a plurality of NAND cell units which are arranged with a plurality of memory cells connected in series and a first selection transistor and a second selection transistor which are each connected to both ends of the plurality of memory cells respectively, a plurality of word lines and a plurality of bit lines which are connected to the plurality of memory cells and a data read control part wherein at least one of the memory cells is selected and when data is read from that memory cell a read pass voltage is applied to a word line which is connected to a non-selected memory cell other than the selected memory cell, and after applying the read pass voltage a voltage is applied to a control gate of the first selection transistor or the second selection transistor, and when applying the read pass voltage, the read pass voltage which is applied to the word line which is connected to at least one of the non-selected memory cells which is adjacent to the first selection transistor or the second selection transistor, is made lower than the read pass voltage which is applied to the word line which is connected to another cell of the non-selected memory cells.

    Abstract translation: 非易失性半导体存储器包括存储单元阵列,该存储单元阵列具有多个与单元串联连接的NAND单元单元,第一选择晶体管和第二选择晶体管分别连接到多个存储器的两端 分别连接到多个存储单元的多个字线和多个位线,以及数据读取控制部分,其中至少一个存储器单元被选择,并且当从该存储器单元读取数据时读取 将通过电压施加到连接到除所选存储单元之外的未选择的存储单元的字线,并且在施加读取通过电压之后,将电压施加到第一选择晶体管或第二选择晶体管的控制栅极 ,并且当应用读通过电压时,施加到连接到未选择存储器中的至少一个的字线的读通过电压 使与第一选择晶体管或第二选择晶体管相邻的单元小于施加到连接到未选择的存储单元的另一单元的字线的读通过电压。

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