发明申请
- 专利标题： Wiring substrate, semiconductor device and manufacturing method thereof
- 专利标题（中）： 配线基板，半导体装置及其制造方法
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申请号： US11151003申请日： 2005-06-13
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公开(公告)号： US20050276912A1公开(公告)日： 2005-12-15
- 发明人: Hiroko Yamamoto , Osamu Nakamura
- 申请人： Hiroko Yamamoto , Osamu Nakamura
- 优先权： JP2004-175833 20040614
- 主分类号： B05D3/00
- IPC分类号： B05D3/00 ; B05D5/12 ; B29C71/02 ; B32B3/00 ; H01L21/28 ; H01L21/288 ; H01L21/336 ; H01L21/768 ; H01L21/77 ; H01L29/45 ; H05K1/09 ; H05K3/12
摘要：
The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.
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