Invention Application
US20050285250A1 Stacked multi-chip semiconductor package improving connection reliability of stacked chips
有权
堆叠多芯片半导体封装提高了堆叠芯片的连接可靠性
- Patent Title: Stacked multi-chip semiconductor package improving connection reliability of stacked chips
- Patent Title (中): 堆叠多芯片半导体封装提高了堆叠芯片的连接可靠性
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Application No.: US11089361Application Date: 2005-03-25
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Publication No.: US20050285250A1Publication Date: 2005-12-29
- Inventor: Se-Young Jeong , Kang-Wook Lee
- Applicant: Se-Young Jeong , Kang-Wook Lee
- Priority: KR2004-47659 20040624
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L23/02 ; H01L25/065
Abstract:
The chip package includes a first and second semiconductor chip. The first semiconductor chip has a first connection structure that electrically connects to a bond pad on a first surface of the first semiconductor chip. The second semiconductor chip has a second connection structure. The second connection structure is electrically connected to a bond pad on a first surface of the second semiconductor chip and extends through the second semiconductor chip to a second surface of the second semiconductor chip. A portion of the second connection structure extending to the second surface of the second semiconductor chip is electrically connected to the first connection structure and formed of a harder material than the first connection structure.
Public/Granted literature
- US07119425B2 Stacked multi-chip semiconductor package improving connection reliability of stacked chips Public/Granted day:2006-10-10
Information query
IPC分类:
