- 专利标题: Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
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申请号: US11245338申请日: 2005-10-07
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公开(公告)号: US20060034129A1公开(公告)日: 2006-02-16
- 发明人: Kiyoshi Matsubara , Naoki Yashiki , Shiro Baba , Takashi Ito , Hirofumi Mukai , Masanao Sato , Masaaki Terasawa , Kenichi Kuroda , Kazuyoshi Shiba
- 申请人: Kiyoshi Matsubara , Naoki Yashiki , Shiro Baba , Takashi Ito , Hirofumi Mukai , Masanao Sato , Masaaki Terasawa , Kenichi Kuroda , Kazuyoshi Shiba
- 优先权: JP04-091919 19920317; JP04-093908 19920319
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; G06F12/00
摘要:
A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.
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