- 专利标题: Nano-scaled gate structure with self-interconnect capabilities
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申请号: US10930989申请日: 2004-08-31
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公开(公告)号: US20060043435A1公开(公告)日: 2006-03-02
- 发明人: Lawrence Clevenger , Timothy Dalton , Louis Hsu , Carl Radens , Keith Wong , Chih-Chao Yang
- 申请人: Lawrence Clevenger , Timothy Dalton , Louis Hsu , Carl Radens , Keith Wong , Chih-Chao Yang
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
Gate conductors on an integrated circuit are formed with enlarged upper portions which are utilized to electrically connect the gate conductors with other devices. A semiconductor device comprises a gate conductor with an enlarged upper portion which electrically connects the gate conductor to a local diffusion region. Another semiconductor device comprises two gate conductors with enlarged upper portions which merge to create electrically interconnected gate conductors. Methods for forming the above semiconductor devices are also described and claimed.
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