公开(公告)号：US20070164357A1

公开(公告)日：2007-07-19

申请号：US11333068

申请日：2006-01-17

申请人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L31/0392

CPC分类号： H01L27/1203 ,  H01L21/28114 ,  H01L21/823456 ,  H01L21/84 ,  H01L29/42376 ,  H01L2924/0002 ,  H01L2924/00

摘要： A transistor device and method of forming the same comprises a substrate; a first gate electrode over the substrate; a second gate electrode over the substrate; and a landing pad comprising a pair of flanged ends overlapping the second gate electrode, wherein the structure of the second gate electrode is discontinuous with the structure of the landing pad.

摘要翻译： 晶体管器件及其形成方法包括：衬底; 衬底上的第一栅电极; 在所述衬底上方的第二栅电极; 以及着陆垫，其包括与所述第二栅电极重叠的一对凸缘端，其中所述第二栅极的结构与所述着陆焊盘的结构不连续。

公开(公告)号：US20060043435A1

公开(公告)日：2006-03-02

申请号：US10930989

申请日：2004-08-31

申请人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

IPC分类号： H01L29/76

CPC分类号： H01L21/28114 ,  H01L21/76895 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823475 ,  H01L27/0629 ,  H01L27/088 ,  H01L29/41783 ,  H01L29/6653 ,  H01L29/66545

摘要： Gate conductors on an integrated circuit are formed with enlarged upper portions which are utilized to electrically connect the gate conductors with other devices. A semiconductor device comprises a gate conductor with an enlarged upper portion which electrically connects the gate conductor to a local diffusion region. Another semiconductor device comprises two gate conductors with enlarged upper portions which merge to create electrically interconnected gate conductors. Methods for forming the above semiconductor devices are also described and claimed.

公开(公告)号：US20080092367A1

公开(公告)日：2008-04-24

申请号：US11968896

申请日：2008-01-03

申请人： Louis Hsu ,  Lawrence Clevenger ,  Timothy Dalton ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

发明人： Louis Hsu ,  Lawrence Clevenger ,  Timothy Dalton ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

IPC分类号： H01H11/00 ,  H01F41/04

CPC分类号： H01H50/005 ,  H01H2050/007 ,  Y10T29/4902 ,  Y10T29/49105 ,  Y10T29/49147

摘要： A method of fabricating a MEMS switch having a free moving inductive element within in micro-cavity guided by at least one inductive coil. The switch consists of an upper inductive coil at one end of a micro-cavity; optionally, a lower inductive coil; and a free-moving inductive element preferably made of magnetic material. The coils are provided with an inner permalloy core. Switching is achieved by passing a current through the upper coil, inducing a magnetic field unto the inductive element. The magnetic field attracts the free-moving inductive element upwards, shorting two open conductive wires, closing the switch. When the current flow stops or is reversed, the free-moving magnetic element drops back by gravity to the bottom of the micro-cavity and the conductive wires open. When the chip is not mounted with the correct orientation, the lower coil pulls the free-moving inductive element back at its original position.

摘要翻译： 一种制造具有由至少一个感应线圈引导的微腔内的自由运动的感应元件的MEMS开关的方法。 开关由微腔一端的上感应线圈组成; 可选地，下感应线圈; 以及优选由磁性材料制成的自由移动的电感元件。 线圈设有内坡道合金芯。 通过使电流通过上部线圈，从而产生电感元件的磁场来实现切换。 磁场向上吸引自由移动的感应元件，短路两根开放的导线，闭合开关。 当电流停止或反转时，自由移动的磁性元件通过重力返回到微腔的底部并且导线打开。 当芯片没有以正确的方向安装时，下线圈将自由移动的感应元件拉回其原始位置。

公开(公告)号：US20050112957A1

公开(公告)日：2005-05-26

申请号：US10723152

申请日：2003-11-26

申请人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong

发明人： Chih-Chao Yang ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Wong

IPC分类号： H01L21/768 ,  H01L23/367 ,  H01L23/522 ,  H01L23/528 ,  H01L23/48

CPC分类号： H01L23/5223 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76847 ,  H01L21/76877 ,  H01L23/3677 ,  H01L23/5226 ,  H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure and method of fabricating a “Lego”-like interlocking contact for high wiring density semiconductors is characterized in that the barrier liner formed in the contact via extends only partially upwards into the adjacent wire level. As a consequence, current crowding and related reliability problems associated with conventional prior art interconnect structures is avoided and structural integrity of the contact via (metal stud) structure is enhanced. The novel “crown” shape of the Lego-like interlocking contact structure that is fabricated to extend in an upward direction may be employed for other integrated circuit applications including forming capacitor (e.g., MIMCAP) and heat sink structures due to its increased surface area.

摘要翻译： 制造用于高布线密度半导体的“乐高”型互锁触点的结构和方法的特征在于，形成在接触通孔中的隔离衬垫仅部分地向上延伸到相邻的导线层中。 结果，避免了与常规现有技术的互连结构相关的电流拥挤和相关可靠性问题，并且提高了接触通孔（金属螺柱）结构的结构完整性。 制造为沿向上方向延伸的乐高式互锁接触结构的新型“冠”形状可以用于其它集成电路应用，包括由于其增加的表面积而形成电容器（例如，MIMCAP）和散热器结构。

公开(公告)号：US20070252127A1

公开(公告)日：2007-11-01

申请号：US11394263

申请日：2006-03-30

申请人： John Arnold ,  Lawrence Clevenger ,  Timothy Dalton ,  Michael Gaidis ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

发明人： John Arnold ,  Lawrence Clevenger ,  Timothy Dalton ,  Michael Gaidis ,  Louis Hsu ,  Carl Radens ,  Keith Wong ,  Chih-Chao Yang

IPC分类号： H01L29/02

CPC分类号： H01L45/1675 ,  H01L45/06 ,  H01L45/122 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A PCM cell structure comprises a first electrode, a phase change element, and a second electrode, wherein the phase change element is inserted in between the first electrode and the second electrode and only the peripheral edge of one of the first and second electrodes contacts the phase change element thereby reducing the contact area between the phase change element and one of the electrodes thereby increasing the current density through the phase change element and effectively inducing the phase change at a first programming power.

摘要翻译： PCM单元结构包括第一电极，相变元件和第二电极，其中相变元件插入在第一电极和第二电极之间，并且只有第一和第二电极中的一个的周边边缘接触 从而减小相变元件与电极中的一个之间的接触面积，从而通过相变元件增加电流密度，并有效地在第一编程功率下引起相位变化。

公开(公告)号：US20060081986A1

公开(公告)日：2006-04-20

申请号：US10964882

申请日：2004-10-14

申请人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Conal Murray ,  Carl Radens ,  Kwong-Hon Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Conal Murray ,  Carl Radens ,  Kwong-Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L23/52

CPC分类号： H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76847 ,  H01L21/76865 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： The present invention provides an interconnect structure that can be made in the BEOL which exhibits good mechanical contact during normal chip operations and does not fail during various reliability tests as compared with the conventional interconnect structures described above. The inventive interconnect structure has a kinked interface at the bottom of a via that is located within an interlayer dielectric layer. Specifically, the inventive interconnect structure includes a first dielectric layer having at least one metallic interconnect embedded within a surface thereof; a second dielectric layer located atop the first dielectric layer, wherein said second dielectric layer has at least one aperture having an upper line region and a lower via region, wherein the lower via region includes a kinked interface; at least one pair of liners located on at least vertical walls of the at least one aperture; and a conductive material filling the at least one aperture.

摘要翻译： 本发明提供一种可以在BEOL中制造的互连结构，其在正常的芯片操作期间表现出良好的机械接触，并且在与上述的常规互连结构相比在各种可靠性测试期间不会失败。 本发明的互连结构在通孔的底部具有位于层间介质层内的扭结界面。 具体地，本发明的互连结构包括：第一介电层，其具有嵌入在其表面内的至少一个金属互连; 位于所述第一介电层顶部的第二电介质层，其中所述第二电介质层具有至少一个具有上线区域和下通孔区域的孔，其中所述下通孔区域包括扭结界面; 位于所述至少一个孔的至少垂直壁上的至少一对衬垫; 以及填充所述至少一个孔的导电材料。

公开(公告)号：US20050070127A1

公开(公告)日：2005-03-31

申请号：US10674719

申请日：2003-09-30

申请人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Hon Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Carl Radens ,  Keith Hon Wong ,  Chih-Chao Yang

IPC分类号： H01G4/255 ,  H01L21/02 ,  H01L21/66 ,  H01G4/35

CPC分类号： H01G4/255 ,  H01L22/22 ,  H01L28/40

摘要： A method and apparatus for adjusting capacitance of an on-chip capacitor uses exposure of a dielectric material of the capacitor to an ion beam comprising ions of at least one material to modify a dielectric constant of the dielectric material.

摘要翻译： 用于调整片上电容器的电容的方法和装置使用将电容器的电介质材料暴露于包含至少一种材料的离子的离子束，以改变介电材料的介电常数。

公开(公告)号：US20060160349A1

公开(公告)日：2006-07-20

申请号：US11034890

申请日：2005-01-14

申请人： Kwong Wong ,  Louis Hsu ,  Timothy Dalton ,  Carl Radens ,  Chih-Chao Yang ,  Lawrence Clevenger ,  Theodorus Standaert

发明人： Kwong Wong ,  Louis Hsu ,  Timothy Dalton ,  Carl Radens ,  Chih-Chao Yang ,  Lawrence Clevenger ,  Theodorus Standaert

IPC分类号： H01L21/4763

CPC分类号： H01L21/76852 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of making an interconnect comprising: providing an interconnect structure in a dielectric material, recessing the dielectric material such that a portion of the interconnect structure extends above an upper surface of the dielectric; and depositing an encasing cap over the extended portion of the interconnect structure.

摘要翻译： 一种制造互连的方法，包括：在介电材料中提供互连结构，使所述电介质材料凹陷，使得所述互连结构的一部分在所述电介质的上表面上方延伸; 以及在所述互连结构的延伸部分上沉积封装盖。

公开(公告)号：US07657995B2

公开(公告)日：2010-02-09

申请号：US11776835

申请日：2007-07-12

申请人： Louis Hsu ,  Timothy Dalton ,  Lawrence Clevenger ,  Carl Radens ,  Kwong Hon Wong ,  Chih-Chao Yang

发明人： Louis Hsu ,  Timothy Dalton ,  Lawrence Clevenger ,  Carl Radens ,  Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01H11/00 ,  H01H65/00

CPC分类号： H01H59/0009 ,  H01H1/20 ,  H01H2001/0084 ,  H01H2001/0089 ,  Y10T29/49105 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49208

摘要： A method of fabricating a MEMS switch that is fully integratable in a semiconductor fabrication line. The method consists of forming two posts, each end thereof terminating in a cap; a rigid movable conductive plate having a surface terminating in a ring in each of two opposing edges, the rings being loosely connected to guiding posts; forming upper and lower electrode pairs and upper and lower interconnect wiring lines connected and disconnected by the rigid movable conductive plate. The conductive plate moves up, shorting two upper interconnect wirings lines. Conversely, the conductive plate moves down when the voltage is applied to the lower electrode pair, while the upper electrode pair is grounded, shorting the two lower interconnect wiring lines and opening the upper wiring lines.

摘要翻译： 一种制造可在半导体制造生产线中完全集成的MEMS开关的方法。 该方法包括形成两个柱，其每端终止于盖中; 刚性可移动导电板，其表面终止于两个相对边缘中的每一个中的环中，所述环松散地连接到引导柱; 形成上下电极对以及由刚性可移动导电板连接和断开的上下互连布线。 导电板向上移动，使两条上部互连线路短路。 相反，当电压施加到下电极对时，导电板向下移动，而上电极对接地，使两个下互连布线短路并打开上布线。

公开(公告)号：US20070023806A1

公开(公告)日：2007-02-01

申请号：US11193660

申请日：2005-07-29

申请人： Michael Gaidis ,  Carl Radens ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Keith Hon Wong ,  Chih-Chao Yang

发明人： Michael Gaidis ,  Carl Radens ,  Lawrence Clevenger ,  Timothy Dalton ,  Louis Hsu ,  Keith Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L29/94

CPC分类号： B82Y10/00 ,  H01L27/222 ,  H01L43/12

摘要： A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.

摘要翻译： 磁性随机存取存储器（MRAM）器件包括形成在下布线层上的磁隧道结（MTJ）堆叠，形成在MTJ堆叠上的硬掩模和形成在硬掩模上的上布线层。 上布线层包括经由位于其中的位线的槽，槽经由与硬掩模接触的位线并与部分地围绕硬掩模的侧壁的蚀刻停止层接触。