发明申请
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US11401284申请日: 2006-04-11
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公开(公告)号: US20060180943A1公开(公告)日: 2006-08-17
- 发明人: Takashi Miwa , Yasumi Tsutsumi , Masahiro Ichitani , Takanori Hashizume , Masamichi Sato , Naozumi Morino , Atsushi Nakamura , Saneaki Tamaki , Ikuo Kudo
- 申请人: Takashi Miwa , Yasumi Tsutsumi , Masahiro Ichitani , Takanori Hashizume , Masamichi Sato , Naozumi Morino , Atsushi Nakamura , Saneaki Tamaki , Ikuo Kudo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 优先权: JP2002-229250 20020806
- 主分类号: H01L23/52
- IPC分类号: H01L23/52 ; H01L23/48
摘要:
The present invention provides a semiconductor device having a stacked structure which realizes the miniaturization of a contour size and the reduction of thickness. The present invention also provides a semiconductor device which realizes high performance and high reliability in addition to the miniaturization of the contour size. The semiconductor device uses a package substrate on which bonding leads which are formed respectively corresponding to bonding pads for address and data which are distributed to opposing first and second sides of a memory chip and address terminals and data terminals which are connected to the bonding leads are formed. The semiconductor device further includes an address output circuit and a data input/output circuit which are also served for memory access and a signal processing circuit having a data processing function. A semiconductor chip in which bonding pads which are connected to the bonding leads corresponding to the address terminals of the package substrate and bonding pads which are connected to the bonding leads corresponding to the data terminals of the package substrate are distributed to two sides out of four sides and the above-mentioned memory chip are mounted on the package substrate in a stacked structure.
公开/授权文献
- US07286386B2 Semiconductor device 公开/授权日:2007-10-23
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