发明申请
US20070099386A1 INTEGRATION SCHEME FOR HIGH GAIN FET IN STANDARD CMOS PROCESS
审中-公开
标准CMOS工艺中高增益FET的集成方案
- 专利标题： INTEGRATION SCHEME FOR HIGH GAIN FET IN STANDARD CMOS PROCESS
- 专利标题（中）： 标准CMOS工艺中高增益FET的集成方案
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申请号： US11163791申请日： 2005-10-31
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公开(公告)号： US20070099386A1公开(公告)日： 2007-05-03
- 发明人: Douglas Coolbaugh , Ebenezer Eshun , Robert Rassel , James Slinkman , Michael Zierak
- 申请人： Douglas Coolbaugh , Ebenezer Eshun , Robert Rassel , James Slinkman , Michael Zierak
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L29/788
摘要：
A method for fabricating high gain FETs that substantially reduces or eliminates unwanted variation in device characteristics caused by using a prior art shadow masking process is provided. The inventive method employs a blocking mask that at least partially extends over the gate region wherein after extension and halo implants an FET having an asymmetric halo region asymmetric extension regions or a combination thereof is fabricated. The inventive method thus provides high gain FETs in which the variation of device characteristics is substantially reduced. The present invention also relates to the resulting asymmetric high gain FET device that is fabricated utilizing the method of the present invention.
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