发明申请
US20070210354A1 Semiconductor device and semiconductor device manufacturing method
审中-公开
半导体器件和半导体器件制造方法
- 专利标题: Semiconductor device and semiconductor device manufacturing method
- 专利标题(中): 半导体器件和半导体器件制造方法
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申请号: US11713627申请日: 2007-03-05
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公开(公告)号: US20070210354A1公开(公告)日: 2007-09-13
- 发明人: Toshihide Nabatame , Masaru Kadoshima
- 申请人: Toshihide Nabatame , Masaru Kadoshima
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 优先权: JPJP2006-65674 20060310
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
Provided is a technology capable of improving the productivity of a p channel MISFET using a high dielectric-constant film as a gate insulating film and a conductive film containing metal as a gate electrode. In this technology, a threshold voltage of the p channel MISFET can be decreased even if a work function value of the conductive film containing metal at the time of contacting a silicon oxide film is away from a value near a valence band of silicon. A p channel MISFET formed on a semiconductor substrate has a gate insulating film formed of a hafnium oxide film, a metal oxide film formed of an aluminum oxide film on this gate insulating film, and a gate electrode formed of a tantalum nitride film on this metal oxide film. The metal oxide film has a function to shift a work function value of the gate electrode.
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