发明申请
US20070298580A1 Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating
失效
金属 - 绝缘体 - 金属电容器的双镶嵌互连和制造方法
- 专利标题: Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating
- 专利标题(中): 金属 - 绝缘体 - 金属电容器的双镶嵌互连和制造方法
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申请号: US11897417申请日: 2007-08-30
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公开(公告)号: US20070298580A1公开(公告)日: 2007-12-27
- 发明人: Kyoung-woo Lee , Soo-geun Lee
- 申请人: Kyoung-woo Lee , Soo-geun Lee
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR03-21036 20030403
- 主分类号: H01L21/20
- IPC分类号: H01L21/20
摘要:
Provided are a dual damascene interconnection with a metal-insulator-metal (MIM) capacitor and a method of fabricating the same. In this structure, an MIM capacitor is formed on a via-level IMD. After the via-level IMD is formed, while an alignment key used for patterning the MIM capacitor is being formed, a via hole is formed to connect a lower electrode of the MIM capacitor and an interconnection disposed under the via-level IMD. Also, an upper electrode of the MIM capacitor is directly connected to an upper metal interconnection during a dual damascene process.
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