A semiconductor memory device comprising a substrate, a memory electrically connected to the substrate, a first and a second transmission/reception units transmitting a signal supplied by the memory and receiving a signal to be supplied to the memory, both arranged on a surface of the substrate, a branch circuit which is electrically connected to the first and the second transmission/reception units, and electrically discriminates the second transmission/reception unit from the memory, and a conversion circuit which converts the signal between the branch circuit and the memory into a signal in a predetermined format.