发明申请
US20080137470A1 Memory with data clock receiver and command/address clock receiver 审中-公开
具有数据时钟接收器和命令/地址时钟接收器的存储器

Memory with data clock receiver and command/address clock receiver
摘要:
One embodiment provides a memory device including a memory bank, a first receiver, and a second receiver. The memory bank includes memory cells. The first receiver is configured to receive a clock signal and provide a data clock signal based on the clock signal. The second receiver is configured to receive the clock signal and provide a command/address clock signal based on the clock signal. The first receiver provides the data clock signal to output read data from the memory cells. The second receiver provides the command/address clock signal to execute commands.
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