Invention Application
US20080168418A1 Integrated assist features for epitaxial growth bulk/SOI hybrid tiles with compensation
有权
用于补偿的外延生长体/ SOI混合瓦的综合辅助功能
- Patent Title: Integrated assist features for epitaxial growth bulk/SOI hybrid tiles with compensation
- Patent Title (中): 用于补偿的外延生长体/ SOI混合瓦的综合辅助功能
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Application No.: US11651253Application Date: 2007-01-08
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Publication No.: US20080168418A1Publication Date: 2008-07-10
- Inventor: Omar Zia , Nigel Cave , Venkat Kolagunta , Ruiqi Tian , Edward O. Travis
- Applicant: Omar Zia , Nigel Cave , Venkat Kolagunta , Ruiqi Tian , Edward O. Travis
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for making a semiconductor device is provided which comprises (a) creating a first data set (301) which defines a first set of tiles (303) for a trench chemical mechanical polishing (CMP) process; (b) deriving a first trench CMP mask set (307) and at least one epitaxial growth mask set (321, 331) from the first data set, wherein the at least one epitaxial growth mask set corresponds to tiles (305, 307) present on first (203) and second (207) distinct semiconductor surfaces; (c) reconfiguring the first trench CMP mask set to account for the at least one epitaxial growth mask set, thereby defining a second trench CMP mask set (308), wherein the second trench CMP mask set defines a set of trench CMP tiles; and (d) using the second trench CMP mask set to make a semiconductor device.
Public/Granted literature
- US07470624B2 Integrated assist features for epitaxial growth bulk/SOI hybrid tiles with compensation Public/Granted day:2008-12-30
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