发明申请
- 专利标题： WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS
- 专利标题（中）： 可堆叠集成电路板的水平面钝化
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申请号： US12142589申请日： 2008-06-19
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公开(公告)号： US20080315434A1公开(公告)日： 2008-12-25
- 发明人: Simon J.S. McElrea , Terrence Caskey , Scott McGrath , DeAnn Eileen Melcher , Reynaldo Co , Lawrence Douglas Andrews, JR. , Weiping Pan , Grant Villavicencio , Yong Du , Scott Jay Crane , Zongrong Liu
- 申请人： Simon J.S. McElrea , Terrence Caskey , Scott McGrath , DeAnn Eileen Melcher , Reynaldo Co , Lawrence Douglas Andrews, JR. , Weiping Pan , Grant Villavicencio , Yong Du , Scott Jay Crane , Zongrong Liu
- 申请人地址： US CA Scotts Valley
- 专利权人： Vertical Circuits, Inc.
- 当前专利权人： Vertical Circuits, Inc.
- 当前专利权人地址： US CA Scotts Valley
- 主分类号： H01L21/304
- IPC分类号： H01L21/304 ; H01L23/488
摘要：
An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
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