发明申请
- 专利标题: METHOD OF FORMING A VIA
- 专利标题(中): 形成威盛的方法
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申请号: US11948209申请日: 2007-11-30
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公开(公告)号: US20090142895A1公开(公告)日: 2009-06-04
- 发明人: Tab A. Stephens , Olubunmi O. Adetutu , Paul A. Grudowski , Matthew T. Herrick
- 申请人: Tab A. Stephens , Olubunmi O. Adetutu , Paul A. Grudowski , Matthew T. Herrick
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234
摘要:
A method for forming a via includes forming a gate electrode over a semiconductor substrate, forming a source/drain region in the semiconductor substrate adjacent the gate electrode, forming a silicide region in the source/drain region, forming a post-silicide spacer adjacent the gate electrode after forming the silicide region, forming an interlayer dielectric layer over the gate electrode, the post-silicide spacer, and the silicide region, and forming a conductive via in the interlayer dielectric layer, extending to the silicide region.
公开/授权文献
- US07745298B2 Method of forming a via 公开/授权日:2010-06-29
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