Invention Application
- Patent Title: METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION
- Patent Title (中): 形状和时间等效尺寸提取方法
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Application No.: US12211624Application Date: 2008-09-16
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Publication No.: US20090222785A1Publication Date: 2009-09-03
- Inventor: Ying-Chou CHENG , Chih-Ming LAI , Ru-Gun LIU , Tsong-Hua OU , Min-Hong WU , Yih-Yuh DOONG , Hsiao-Shu CHAO , Yi-Kan CHENG , Yao-Ching KU , Cliff HOU
- Applicant: Ying-Chou CHENG , Chih-Ming LAI , Ru-Gun LIU , Tsong-Hua OU , Min-Hong WU , Yih-Yuh DOONG , Hsiao-Shu CHAO , Yi-Kan CHENG , Yao-Ching KU , Cliff HOU
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
An integrated circuit (IC) design method includes providing an IC layout contour based on an IC design layout of an IC device and IC manufacturing data; generating an effective rectangle layout to represent the IC layout contour; and simulating the IC device using the effective rectangular layout.
Public/Granted literature
- US08037575B2 Method for shape and timing equivalent dimension extraction Public/Granted day:2011-10-18
Information query
