Invention Application
US20100079200A1 PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANALOG CIRCUITS USING A SINGLE PROCESS
有权
使用单一过程实现高性能逻辑和模拟电路的过程/设计方法
- Patent Title: PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANALOG CIRCUITS USING A SINGLE PROCESS
- Patent Title (中): 使用单一过程实现高性能逻辑和模拟电路的过程/设计方法
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Application No.: US12241706Application Date: 2008-09-30
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Publication No.: US20100079200A1Publication Date: 2010-04-01
- Inventor: Qi Xiang , Albert Ratnakumar , Jeffrey Xiaoqi Tung , Weiqi Ding
- Applicant: Qi Xiang , Albert Ratnakumar , Jeffrey Xiaoqi Tung , Weiqi Ding
- Main IPC: G05F1/10
- IPC: G05F1/10 ; H01L21/336

Abstract:
A method for improving analog circuits performance using a circuit design using forward bias and a modified mixed-signal process is presented. A circuit consisting plurality of NMOS and PMOS transistors is defined. The body terminal of the NMOS transistors are coupled to a first voltage source and the body terminal of the PMOS transistors are coupled a second voltage source. Transistors in the circuit are selectively biased by applying the first voltage source to the body terminal of each selected NMOS transistor and applying the second voltage source to the body terminal of each selected PMOS transistor. In one embodiment, the first voltage source and the second voltage source are modifiable to provide forward and reverse bias to the body terminal of the transistors.
Public/Granted literature
- US07952423B2 Process/design methodology to enable high performance logic and analog circuits using a single process Public/Granted day:2011-05-31
Information query
IPC分类: