- 专利标题: Package for semiconductor devices
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申请号: US12659081申请日: 2010-02-24
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公开(公告)号: US20100155933A1公开(公告)日: 2010-06-24
- 发明人: Kazuhiko Ooi , Tadashi Kodaira , Eisaku Watari , Jyunichi Nakamura , Shunichiro Matsumoto
- 申请人: Kazuhiko Ooi , Tadashi Kodaira , Eisaku Watari , Jyunichi Nakamura , Shunichiro Matsumoto
- 申请人地址: JP Nagano
- 专利权人: Shinko Electronics
- 当前专利权人: Shinko Electronics
- 当前专利权人地址: JP Nagano
- 优先权: JP2003-155333 20030530
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
To prevent or alleviate the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package for mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a low strength. A package for semiconductor devices is formed as a laminate of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon the other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole region or some region(s) of the insulating resin layers of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.
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