发明申请
US20100164011A1 Techniques for Enabling Multiple Vt Devices Using High-K Metal Gate Stacks
有权
使用高K金属栅极堆栈启用多个Vt器件的技术
- 专利标题： Techniques for Enabling Multiple Vt Devices Using High-K Metal Gate Stacks
- 专利标题（中）： 使用高K金属栅极堆栈启用多个Vt器件的技术
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申请号： US12720354申请日： 2010-03-09
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公开(公告)号： US20100164011A1公开(公告)日： 2010-07-01
- 发明人: Martin M. Frank , Arvind Kumar , Vijay Narayanan , Vamsi K. Paruchuri , Jeffrey Sleight
- 申请人： Martin M. Frank , Arvind Kumar , Vijay Narayanan , Vamsi K. Paruchuri , Jeffrey Sleight
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L29/78
- IPC分类号： H01L29/78
摘要：
Techniques for combining transistors having different threshold voltage requirements from one another are provided. In one aspect, a semiconductor device comprises a substrate having a first and a second nFET region, and a first and a second pFET region; a logic nFET on the substrate over the first nFET region; a logic pFET on the substrate over the first pFET region; a SRAM nFET on the substrate over the second nFET region; and a SRAM pFET on the substrate over the second pFET region, each comprising a gate stack having a metal layer over a high-K layer. The logic nFET gate stack further comprises a capping layer separating the metal layer from the high-K layer, wherein the capping layer is further configured to shift a threshold voltage of the logic nFET relative to a threshold voltage of one or more of the logic pFET, SRAM nFET and SRAM pFET.