发明申请
- 专利标题： PATTERN GENERATING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT
- 专利标题（中）： 图案生成方法，制造半导体器件的方法和计算机程序产品
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申请号： US12705640申请日： 2010-02-15
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公开(公告)号： US20100241261A1公开(公告)日： 2010-09-23
- 发明人: Takafumi TAGUCHI , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
- 申请人： Takafumi TAGUCHI , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
- 优先权： JP2009-070976 20090323
- 主分类号： G05B13/04
- IPC分类号： G05B13/04 ; G06F17/50 ; G06F19/00
摘要：
Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.
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