发明申请
- 专利标题: SEMICONDUCTOR DEVICE HAVING VERTICAL TRANSISTOR AND METHOD OF FABRICATING THE SAME
- 专利标题(中): 具有垂直晶体管的半导体器件及其制造方法
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申请号: US12840599申请日: 2010-07-21
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公开(公告)号: US20100283094A1公开(公告)日: 2010-11-11
- 发明人: Bong-Soo Kim , Kang-Yoon Lee , Dong-Gun Park , Jae-Man Yoon , Seong-Goo Kim , Hyeoung-Won Seo
- 申请人: Bong-Soo Kim , Kang-Yoon Lee , Dong-Gun Park , Jae-Man Yoon , Seong-Goo Kim , Hyeoung-Won Seo
- 申请人地址: KR Suwon-si
- 专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR10-2005-0095044 20051010
- 主分类号: H01L27/108
- IPC分类号: H01L27/108
摘要:
There are provided a semiconductor device having a vertical transistor and a method of fabricating the same. The method includes preparing a semiconductor substrate having a cell region and a peripheral circuit region. Island-shaped vertical gate structures two-dimensionally aligned along a row direction and a column direction are formed on the substrate of the cell region. Each of the vertical gate structures includes a semiconductor pillar and a gate electrode surrounding a center portion of the semiconductor pillar. A bit line separation trench is formed inside the semiconductor substrate below a gap region between the vertical gate structures, and a peripheral circuit trench confining a peripheral circuit active region is formed inside the semiconductor substrate of the peripheral circuit region. The bit line separation trench is formed in parallel with the column direction of the vertical gate structures. A bit line separation insulating layer and a peripheral circuit isolation layer are formed inside the bit line separation trench and the peripheral circuit trench, respectively.
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