发明申请
US20100299471A1 Microcontroller with an Interrupt Structure Having Programmable Priority Levels with each Priority Level Associated with a Different Register Set
有权
具有中断结构的微控制器，具有与不同寄存器集相关联的每个优先级的可编程优先级
- 专利标题： Microcontroller with an Interrupt Structure Having Programmable Priority Levels with each Priority Level Associated with a Different Register Set
- 专利标题（中）： 具有中断结构的微控制器，具有与不同寄存器集相关联的每个优先级的可编程优先级
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申请号： US12785943申请日： 2010-05-24
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公开(公告)号： US20100299471A1公开(公告)日： 2010-11-25
- 发明人: Pankaj Shrivastava , Gregory Goodhue , Ata khan , Zhimin Ding , Craig Mackenna
- 申请人： Pankaj Shrivastava , Gregory Goodhue , Ata khan , Zhimin Ding , Craig Mackenna
- 主分类号： G06F13/24
- IPC分类号： G06F13/24
摘要：
Aspects of the disclosure are directed to a system having a particularly-configured microcontroller. In one embodiment, the microcontroller includes the following: a processor; a processor data bus connected to the processor; a set of peripherals; a peripheral data bus connected to the peripherals; a peripheral bus bridge providing an interface between the processor data bus and the peripheral data base and including a plurality of special function register bank blocks that are internal to the microcontroller, each register bank block having a respective output; and a register bank block decoder circuit for decoding interrupts to provide a selection output for activation of one of the plurality of register bank blocks.