Invention Application
- Patent Title: Resistive Memory Structure with Buffer Layer
- Patent Title (中): 具有缓冲层的电阻式存储器结构
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Application No.: US13083450Application Date: 2011-04-08
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Publication No.: US20110189819A1Publication Date: 2011-08-04
- Inventor: Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
- Applicant: Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/8239
- IPC: H01L21/8239

Abstract:
A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
Information query
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