Invention Application
- Patent Title: METHOD FOR EVALUATING FAILURE RATE
- Patent Title (中): 评估失败率的方法
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Application No.: US12979914Application Date: 2010-12-28
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Publication No.: US20120166130A1Publication Date: 2012-06-28
- Inventor: Yun-Chi YANG , Yen-Song Liu , Chin-Hsien Chen , Sheng-Yu Wu , Kuan-Cheng Su
- Applicant: Yun-Chi YANG , Yen-Song Liu , Chin-Hsien Chen , Sheng-Yu Wu , Kuan-Cheng Su
- Applicant Address: TW Hsinchu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsinchu
- Main IPC: G06F19/00
- IPC: G06F19/00

Abstract:
A method for evaluating failure rate, which is applied to a plurality of semiconductor chips with error checking and correcting function includes the following steps. A first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of first failure bit counting values. The error checking and correcting function of each of the semiconductor chips is off. An aging test is applied to the semiconductor chips. A second read-write test operation as the first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of second failure bit counting values. The number of the semiconductor chips, the first failure bit counting values, the second failure bit counting values and an error checking and correcting coefficient are calculated to obtain a failure rate of the semiconductor chips.
Public/Granted literature
- US08510635B2 Method for evaluating failure rate Public/Granted day:2013-08-13
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