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20 条记录 (耗时 0.017 秒)

    Non-volatile memory and method of fabricating the same
    2.
    发明申请
    Non-volatile memory and method of fabricating the same 有权
    非易失性存储器及其制造方法

    公开(公告)号：US20070269943A1

    公开(公告)日：2007-11-22

    申请号：US11435458

    申请日：2006-05-16

    申请人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    发明人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    IPC分类号： H01L21/8234

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792

    摘要： A method of fabricating a non-volatile memory is provided. First, two openings are formed on a substrate. A stacked gate structure comprising a first dielectric layer, a charge storage layer, a second dielectric layer and a first conductive layer is formed on the substrate between the two openings. A liner is formed on a bottom and a portion of a sidewall of the tow openings, wherein a top surface of the liner is lower than that of the substrate. A second conductive layer is formed on the liner at the bottom of the two openings, wherein a top surface of the second conductive layer is co-planar with that of the liner. A third conductive layer is formed on the second conductive layer and the liner, wherein a top surface of the third conductive layer is co-planar with that of the substrate and lower than that of the first dielectric layer.

    摘要翻译： 提供了一种制造非易失性存储器的方法。 首先，在基板上形成两个开口。 在两个开口之间的基板上形成包括第一电介质层，电荷存储层，第二电介质层和第一导电层的堆叠栅极结构。 衬套形成在丝束开口的侧壁的底部和一部分上，其中衬垫的顶表面低于衬底的顶表面。 第二导电层形成在两个开口的底部的衬垫上，其中第二导电层的顶表面与衬垫的顶表面共面。 第三导电层形成在第二导电层和衬垫上，其中第三导电层的顶表面与衬底的顶表面平行，并且低于第一介电层的顶表面。

    Method for removing extraneous matter by using fluorine-containing solution
    3.
    发明授权
    Method for removing extraneous matter by using fluorine-containing solution 失效
    使用含氟溶液除去外来物质的方法

    公开(公告)号：US06315834B1

    公开(公告)日：2001-11-13

    申请号：US09427201

    申请日：1999-10-25

    申请人： Ping-Chung Chung ,  Tsung-Lin Lu ,  Hunter Chung ,  Chin-Hsien Chen ,  Weng-Yi Chen ,  Jack Yao ,  Chienfeng Chen

    发明人： Ping-Chung Chung ,  Tsung-Lin Lu ,  Hunter Chung ,  Chin-Hsien Chen ,  Weng-Yi Chen ,  Jack Yao ,  Chienfeng Chen

    IPC分类号： C03C2300

    CPC分类号： C23C16/4407 ,  C23G1/24

    摘要： A method for removing extraneous matters from a stainless device is provided. The method includes the steps of (a) providing a container for holding a fluorine-containing neutral solution therein, (b) immersing said stainless device in said fluorine-containing neutral solution to remove said extraneous matters from said stainless device, and (c) heating and swirling said fluorine-containing solution. The fluorine-containing neutral solution is made from neutralizing hydrofluoric acid (HF) with ammonium hydroxide (NH4OH), neutralizing hydrofluoric acid (HF) with ammonium fluoride (NH4F), or dissolving ammonium acid fluoride (NH4F) in a deionized water (DIW).

    摘要翻译： 提供了从不锈钢装置中除去外来物质的方法。 该方法包括以下步骤：（a）在其中提供用于保持含氟中性溶液的容器，（b）将所述不锈钢装置浸入所述含氟中性溶液中以从所述不锈钢装置中除去所述外来物质;（c） 加热和旋转所述含氟溶液。 含氟中性溶液是用氢氧化铵（NH 4 OH）中和氢氟酸（HF），中和氢氟酸（HF）与氟化铵（NH4F）或将铵态氟化铵（NH4F）溶解在去离子水（DIW）中制成的， 。

    Method for evaluating failure rate
    4.
    发明授权
    Method for evaluating failure rate 有权
    评估失败率的方法

    公开(公告)号：US08510635B2

    公开(公告)日：2013-08-13

    申请号：US12979914

    申请日：2010-12-28

    申请人： Yun-Chi Yang ,  Yen-Song Liu ,  Chin-Hsien Chen ,  Sheng-Yu Wu ,  Kuan-Cheng Su

    发明人： Yun-Chi Yang ,  Yen-Song Liu ,  Chin-Hsien Chen ,  Sheng-Yu Wu ,  Kuan-Cheng Su

    IPC分类号： G11C29/00

    CPC分类号： G11C29/52 ,  G01R31/287 ,  G11C29/42 ,  G11C29/44 ,  G11C29/56008 ,  G11C2029/0409 ,  G11C2029/0411

    摘要： A method for evaluating failure rate, which is applied to a plurality of semiconductor chips with error checking and correcting function includes the following steps. A first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of first failure bit counting values. The error checking and correcting function of each of the semiconductor chips is off. An aging test is applied to the semiconductor chips. A second read-write test operation as the first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of second failure bit counting values. The number of the semiconductor chips, the first failure bit counting values, the second failure bit counting values and an error checking and correcting coefficient are calculated to obtain a failure rate of the semiconductor chips.

    摘要翻译： 一种用于评估故障率的方法，其应用于具有错误检查和校正功能的多个半导体芯片包括以下步骤。 对半导体芯片应用第一读写测试操作，从而获得多个第一故障比特计数值。 每个半导体芯片的错误检查和校正功能关闭。 对半导体芯片进行老化试验。 作为第一读写测试操作的第二读写测试操作被应用于半导体芯片，从而获得多个第二故障位计数值。 计算半导体芯片的数量，第一故障比特计数值，第二故障比特计数值和错误校验系数，以获得半导体芯片的故障率。

    CARBAZOLE SERIAL COMPOUNDS
    5.
    发明申请
    CARBAZOLE SERIAL COMPOUNDS 审中-公开
    卡巴唑系列化合物

    公开(公告)号：US20130043460A1

    公开(公告)日：2013-02-21

    申请号：US13316995

    申请日：2011-12-12

    申请人： Chien-Hong CHENG ,  Fang-ly WU ,  Chin-Hsien CHEN ,  Hsiu-Yun TSAI ,  Lun-Chia HSU

    发明人： Chien-Hong CHENG ,  Fang-ly WU ,  Chin-Hsien CHEN ,  Hsiu-Yun TSAI ,  Lun-Chia HSU

    IPC分类号： H01L51/54 ,  C07D409/10 ,  C07D401/10 ,  C07D209/86

    CPC分类号： C07D209/80 ,  C07D209/86 ,  C07D401/10 ,  C07D409/04 ,  H01L51/0068 ,  H01L51/0072 ,  H01L51/5012

    摘要： Disclosed is a carbazole serial compound, having a general formula as: wherein X is selected from a halogen atom, a cyano group, a substituted or non-substituted C1-40 alkyl group, a substituted or non-substituted C2-40 alkenyl group, a substituted or non-substituted C2-40 alkynyl group, a substituted or non-substituted C6-40 aryl group, a substituted or non-substituted C4-40 hetero aryl group, a substituted or non-substituted C6-40 aryl amino group, or a substituted or non-substituted C1-40 alkyl amino group. Each R is independently selected from a hydrogen atom, a cyano group, a substituted or non-substituted C1-40 alkyl group, a substituted or non-substituted C2-40 alkenyl group, a substituted or non-substituted C2-40 alkynyl group, a substituted or non-substituted C6-40 aryl group, a substituted or non-substituted C4-40 hetero aryl group, a substituted or non-substituted C6-40 aryl amino group, or a substituted or non-substituted C1-40 alkyl amino group.

    摘要翻译： 公开了具有以下通式的咔唑系列化合物：其中X选自卤素原子，氰基，取代或未取代的C 1-4烷基，取代或未取代的C 2-40烯基， 取代或未取代的C 2-40炔基，取代或未取代的C 6-40芳基，取代或未取代的C 4-40杂芳基，取代或未取代的C 6-40芳基氨基， 或取代或未取代的C 1-4烷基氨基。 每个R独立地选自氢原子，氰基，取代或未取代的C 1-40烷基，取代或未取代的C 2-40烯基，取代或未取代的C 2-40炔基， 取代或未取代的C 6-40芳基，取代或未取代的C 4-40杂芳基，取代或未取代的C 6-40芳基氨基，或取代或未取代的C 1-4烷基氨基 组。

    NON-VOLATILE MEMORY
    6.
    发明申请
    NON-VOLATILE MEMORY 有权
    非易失性存储器

    公开(公告)号：US20090212353A1

    公开(公告)日：2009-08-27

    申请号：US12434828

    申请日：2009-05-04

    申请人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    发明人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    IPC分类号： H01L29/792

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792

    摘要： A non-volatile memory includes a substrate having two openings, a stacked gate structure disposed on the substrate between the two openings, a liner disposed on a bottom of each of the two openings and parts of a sidewall of each of the two openings, a second conductive layer disposed on the liner at the bottom of each of the two openings, and a third conductive layer on the second conductive layer and the liner. The stacked gate structure includes a first dielectric layer, a charge storage layer, a second dielectric layer, and a first conductive layer. The liner has a top surface lower than that of the substrate. The second conductive layer has a top surface co-planar with that of the liner. The third conductive layer has a top surface at least co-planar with that of the substrate and lower than that of the first dielectric layer.

    摘要翻译： 非易失性存储器包括具有两个开口的衬底，设置在两个开口之间的衬底上的堆叠栅极结构，设置在两个开口中的每一个的底部和两个开口中的每一个的侧壁的一部分的衬垫， 设置在两个开口中的每一个的底部的衬垫上的第二导电层，以及在第二导电层和衬垫上的第三导电层。 层叠栅极结构包括第一介电层，电荷存储层，第二介电层和第一导电层。 衬垫具有比衬底更低的顶表面。 第二导电层具有与衬垫的顶表面共面的顶表面。 第三导电层具有至少与基底的共面的顶表面，并且低于第一介电层的顶表面。

    Non-volatile memory and method of fabricating the same
    7.
    发明授权
    Non-volatile memory and method of fabricating the same 有权
    非易失性存储器及其制造方法

    公开(公告)号：US07572691B2

    公开(公告)日：2009-08-11

    申请号：US11435458

    申请日：2006-05-16

    申请人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    发明人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

    IPC分类号： H01L21/336 ,  H01L21/8234

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792

    摘要： A method of fabricating a non-volatile memory is provided. First, two openings are formed on a substrate. A stacked gate structure comprising a first dielectric layer, a charge storage layer, a second dielectric layer and a first conductive layer is formed on the substrate between the two openings. A liner is formed on a bottom and a portion of a sidewall of the tow openings, wherein a top surface of the liner is lower than that of the substrate. A second conductive layer is formed on the liner at the bottom of the two openings, wherein a top surface of the second conductive layer is co-planar with that of the liner. A third conductive layer is formed on the second conductive layer and the liner, wherein a top surface of the third conductive layer is co-planar with that of the substrate and lower than that of the first dielectric layer.

    摘要翻译： 提供了一种制造非易失性存储器的方法。 首先，在基板上形成两个开口。 在两个开口之间的基板上形成包括第一电介质层，电荷存储层，第二电介质层和第一导电层的堆叠栅极结构。 衬套形成在丝束开口的侧壁的底部和一部分上，其中衬垫的顶表面低于衬底的顶表面。 第二导电层形成在两个开口的底部的衬垫上，其中第二导电层的顶表面与衬垫的顶表面共面。 第三导电层形成在第二导电层和衬垫上，其中第三导电层的顶表面与衬底的顶表面平行，并且低于第一介电层的顶表面。

    PORTABLE COMPUTER
    9.
    发明申请
    PORTABLE COMPUTER 审中-公开
    便携式计算机

    公开(公告)号：US20110279971A1

    公开(公告)日：2011-11-17

    申请号：US12820084

    申请日：2010-06-21

    申请人： CHIN-HSIEN CHEN ,  RUNG-AN CHEN

    发明人： CHIN-HSIEN CHEN ,  RUNG-AN CHEN

    IPC分类号： H05K7/00

    CPC分类号： G06F1/1656 ,  A61F7/007 ,  A61F2007/0036 ,  A61F2007/0096

    摘要： An exemplary portable computer includes a casing and temperature control unit received in the casing. The casing includes a first outer portion and a second outer portion having different surface temperatures. The temperature control unit includes a controller, two temperature sensing wires and a heater. The heater is located at the first outer portion and coupled to the controller. The temperature sensing wires each includes a first end and a second end. The first ends are coupled to the controller, and the second ends respectively attaches the first and second outer portions for detecting the surface temperatures thereof. During operation, the controller reads the surface temperatures of the first and second outer portions via the temperature sensing wires, respectively, and outputs a control signal to the heater, thereby controlling operation of the heater to reduce a temperature difference between the first and second outer portions.

    摘要翻译： 示例性便携式计算机包括容纳在壳体中的壳体和温度控制单元。 壳体包括具有不同表面温度的第一外部部分和第二外部部分。 温度控制单元包括控制器，两个温度感测线和加热器。 加热器位于第一外部部分并且耦合到控制器。 温度感测线各自包括第一端和第二端。 第一端连接到控制器，并且第二端分别附接第一和第二外部以检测其表面温度。 在操作期间，控制器分别通过温度检测线读取第一和第二外部部分的表面温度，并向加热器输出控制信号，从而控制加热器的操作，以减小第一和第二外部之间的温度差 部分。