发明申请
- 专利标题: SEALING STRUCTURE FOR HIGH-K METAL GATE AND METHOD OF MAKING
- 专利标题(中): 高K金属门的密封结构及其制备方法
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申请号: US13465551申请日: 2012-05-07
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公开(公告)号: US20120225529A1公开(公告)日: 2012-09-06
- 发明人: Chieh-Hao Chen , Hao-Ming Lien , Ssu-Yu Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Liang Chen , Chung-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang
- 申请人: Chieh-Hao Chen , Hao-Ming Lien , Ssu-Yu Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Liang Chen , Chung-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/425
摘要:
The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.
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