发明申请
- 专利标题： CHIP-LAST EMBEDDED INTERCONNECT STRUCTURES AND METHODS OF MAKING THE SAME
- 专利标题（中）： 嵌入式嵌入式互连结构及其制备方法
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申请号： US13415503申请日： 2012-03-08
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公开(公告)号： US20120228754A1公开(公告)日： 2012-09-13
- 发明人: FUHAN LIU , Venkatesh Sundaram , Nitesh Kumbhat , Rao Tummala
- 申请人： FUHAN LIU , Venkatesh Sundaram , Nitesh Kumbhat , Rao Tummala
- 申请人地址： US GA Atlanta
- 专利权人： Georgia Tech Research Corporation
- 当前专利权人： Georgia Tech Research Corporation
- 当前专利权人地址： US GA Atlanta
- 主分类号： H01L25/07
- IPC分类号： H01L25/07 ; H01L23/495
摘要：
The various embodiments of the present invention provide a novel chip-last embedded structure, wherein an IC is embedded within a one to two metal layer substrate. The various embodiments of the present invention are comparable to other two-dimensional and three-dimensional WLFO packages of the prior art as the embodiments have similar package thicknesses and X-Y form factors, short interconnect lengths, fine-pitch interconnects to chip I/Os, a reduced layer count for re-distribution of chip I/O pads to ball grid arrays (BGA) or land grid arrays (LGA), and improved thermal management options.
公开/授权文献
- US08536695B2 Chip-last embedded interconnect structures 公开/授权日：2013-09-17
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