发明申请
US20120261827A1 THROUGH-SILICON VIAS FOR SEMICONDCUTOR SUBSTRATE AND METHOD OF MANUFACTURE
有权
用于半导体基片的半导体六角形及其制造方法
- 专利标题: THROUGH-SILICON VIAS FOR SEMICONDCUTOR SUBSTRATE AND METHOD OF MANUFACTURE
- 专利标题(中): 用于半导体基片的半导体六角形及其制造方法
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申请号: US13085668申请日: 2011-04-13
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公开(公告)号: US20120261827A1公开(公告)日: 2012-10-18
- 发明人: Chen-Hua YU , Cheng-Hung CHANG , Ebin LIAO , Chia-Lin YU , Hsiang-Yi WANG , Chun Hua CHANG , Li-Hsien HUANG , Darryl KUO , Tsang-Jiuh WU , Wen-Chih CHIOU
- 申请人: Chen-Hua YU , Cheng-Hung CHANG , Ebin LIAO , Chia-Lin YU , Hsiang-Yi WANG , Chun Hua CHANG , Li-Hsien HUANG , Darryl KUO , Tsang-Jiuh WU , Wen-Chih CHIOU
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/768
摘要:
A semiconductor component includes a semiconductor substrate having a top surface. An opening extends from the top surface into the semiconductor substrate. The opening includes an interior surface. A first dielectric liner having a first compressive stress is disposed on the interior surface of the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. A metal barrier layer is disposed on the third dielectric liner. A conductive material is disposed on the metal barrier layer and fills the opening.
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