发明申请
US20120270379A1 METHOD OF FABRICATING A DUMMY GATE STRUCTURE IN A GATE LAST PROCESS
有权
在门窗最后过程中制造多孔门结构的方法
- 专利标题： METHOD OF FABRICATING A DUMMY GATE STRUCTURE IN A GATE LAST PROCESS
- 专利标题（中）： 在门窗最后过程中制造多孔门结构的方法
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申请号： US13538220申请日： 2012-06-29
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公开(公告)号： US20120270379A1公开(公告)日： 2012-10-25
- 发明人: Su-Chen Lai , Ming-Yuan Wu , Kong-Beng Thei , Harry Hak-Lay Chuang , Chiung-Han Yeh , Hong-Dyi Chang , Kuo Cheng Cheng , Chien-Hung Wu , Tzung-Chi Lee
- 申请人： Su-Chen Lai , Ming-Yuan Wu , Kong-Beng Thei , Harry Hak-Lay Chuang , Chiung-Han Yeh , Hong-Dyi Chang , Kuo Cheng Cheng , Chien-Hung Wu , Tzung-Chi Lee
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
- 当前专利权人地址： TW Hsin-Chu
- 主分类号： H01L21/76
- IPC分类号： H01L21/76
摘要：
A method of semiconductor device fabrication including forming a plurality of gate structures in a first portion of a substrate, wherein the plurality of gate structures have a first height. A first metal gate structure is formed in a second portion of the substrate, the first metal gate structure being surrounded by an isolation region. A plurality of dummy gate structures is formed in the second portion of the substrate. The plurality of dummy gate structures are configured in a ring formation encircling the metal gate structure and the isolation region. The plurality of dummy structures have a top surface that is substantially planar with the plurality of gate structures and covers at least 5% of a pattern density of the second portion of the substrate.