Invention Application
US20120322253A1 METHOD FOR REDUCING INTERFACIAL LAYER THICKNESS FOR HIGH-K AND METAL GATE STACK
有权
用于降低高K和金属栅极叠层的界面层厚度的方法
- Patent Title: METHOD FOR REDUCING INTERFACIAL LAYER THICKNESS FOR HIGH-K AND METAL GATE STACK
- Patent Title (中): 用于降低高K和金属栅极叠层的界面层厚度的方法
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Application No.: US13595599Application Date: 2012-08-27
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Publication No.: US20120322253A1Publication Date: 2012-12-20
- Inventor: Liang-Gi YAO , Chun-Hu CHENG , Chen-Yi LEE , Jeff J. XU , Clement Hsingjen WANN
- Applicant: Liang-Gi YAO , Chun-Hu CHENG , Chen-Yi LEE , Jeff J. XU , Clement Hsingjen WANN
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/283
- IPC: H01L21/283 ; H01L21/311

Abstract:
This description relates to a method including forming an interfacial layer over a semiconductor substrate. The method further includes etching back the interfacial layer. The method further includes performing an ultraviolet (UV) curing process on the interfacial layer. The UV curing process includes supplying a gas flow rate ranging from 10 standard cubic centimeters per minute (sccm) to 5 standard liters per minute (slm), wherein the gas comprises inert gas, and heating the interfacial layer at a temperature less than or equal to 700° C. The method further includes depositing a high-k dielectric material over the interfacial layer.
Public/Granted literature
- US08470659B2 Method for reducing interfacial layer thickness for high-k and metal gate stack Public/Granted day:2013-06-25
Information query
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